The present invention relates to multilayer boards, and particularly multilayer boards suitable for high-density packaged semiconductor elements.
Recently, there is a growing tendency toward high-density packaging of terminals on semiconductors for external connection as patterns of semiconductor elements become finer.
Referring to FIG. 8, the reference numeral 110 represents a semiconductor element comprising an element body 111 in which a fine element such as a transistor is formed. The fine element forms an electronic circuit in said element body 111, and bumps 112 made of solder and for externally connecting the electronic circuit are provided on the surface of the element body 111.
The reference numeral 130 represents a motherboard having a copper wiring with bonding lands on the surface. The semiconductor element 110 cannot be directly mounted on the motherboard 130 because the bumps 112 have a narrower pitch than that of the copper wiring on the motherboard 130.
Thus, the prior art uses an interposer 120 consisting of a resin film 121 on which a fine interconnecting pattern is formed and rough-pitch bumps 122 provided on said resin film 121 to electrically connect the semiconductor element 110 and the motherboard 130, whereby the narrow-pitch bumps 112 on the semiconductor element 110 are connected to the fine interconnecting pattern on the interposer 120 and the pitches are interfaced within the interposer 120 to connect the bumps 122 on the interposer 120 to bonding pads on the motherboard 130.
Recently, such an interposer 120 has a multilayer structure comprising a plurality of conductive layers and resin layers as the number of bumps 112 on the semiconductor element 110 increases.
When the semiconductor element 110 was mounted on the interposer 120 of multilayer structure, however, the problem arose that the bumps 112 on the semiconductor element 110 may be broken.
During investigations of characteristics of the semiconductor element 110 and the interposer 120, we found that the semiconductor element 110 had a thermal expansion coefficient (linear expansion coefficient) of 2.6 ppm/xc2x0 C. while the interposer 120 of multilayer structure of the prior art had a thermal expansion coefficient of 30 ppm/xc2x0 C.
This reveals that, when the semiconductor element 110 is mounted on the motherboard 130 through an interposer having such a high thermal coefficient, a great stress occurs at connecting parts due to the difference between the thermal expansion coefficients of the semiconductor element 110 and the interposer, resulting in thermal fatigue and finally breakage at the bumps 112 on the semiconductor element 110.
An object of the present invention is to overcome the disadvantages of the prior art described above and to provide a multilayer board capable of forming an interposer or motherboard free from breakage at connecting parts.
The present invention provides a multilayer board comprising a plurality of alternating resin layers and conductive layers and having a thermal expansion coefficient of less than 10 ppm/xc2x0 C. in the spread-wise direction of the board in a layered state.
In one embodiment of the present invention, each resin layer may consist of a polyimide film having a thermal expansion coefficient of less than 10 ppm/xc2x0 C. in the spread-wise direction of the film and each conductive layer may consist of a metal film having a thermal expansion coefficient of 10 ppm/xc2x0 C. or more in the spread-wise direction of the film.
In another embodiment of the present invention, at least one of said plurality of resin layers may consist of a first type of polyimide film having a thermal expansion coefficient of 2 ppm/xc2x0 C. or more but 5 ppm/xc2x0 C. or less in the spread-wise direction of the film and at least one of the other layers may consist of a second type of polyimide film having a thermal expansion coefficient of more than 5 ppm/xc2x0 C. but 30 ppm/xc2x0 C. or less in the spread-wise direction of the film, and said each conductive layer may consist of a metal film having a thermal expansion coefficient of 10 ppm/xc2x0 C. or more in the spread-wise direction of the film.
When another embodiment of the present invention, at least one of said resin layers may consist of either one of a first type of polyimide film having a thermal expansion coefficient of 2 ppm/xc2x0 C. or more but 5 ppm/xc2x0 C. or less in the spread-wise direction of the film or a second type of polyimide film having a thermal expansion coefficient of more than 5 ppm/xc2x0 C. but 30 ppm/xc2x0 C. or less in the spread-wise direction of the film, and said each conductive layer may consist of a metal film having a thermal expansion coefficient of 10 ppm/xc2x0 C. or more in the spread-wise direction of the film.
When the multilayer board has three or more said resin layers and two or more of said resin layers consist of said second type of polyimide film, a resin layer located between said resin layers consisting of said second type of polyimide film may consist of said first type of polyimide film.
When the multilayer board has three or more said resin layers and two or more of said resin layers consist of said first type of polyimide film, however, a resin layer located between said resin layers consisting of said first type of polyimide film may consist of said second type of polyimide film.
In any cases, one of the first or second type of polyimide film may be located nearly in the middle in the direction of the thickness of said multilayer board while the other polyimide film may be located near the surface of said multilayer board.
In a multilayer board of the present invention, a plurality of conductive bumps having a top projecting from the surface of the multilayer board may be provided on at least one face.
Said conductive layer may be partially exposed on at least one face of said multilayer board. Said conductive bumps may be provided on the same face on which said conductive layer is exposed or the opposite face.
Semiconductor elements such as IC, LSI or discrete elements may be connected to multilayer boards described above to constitute semiconductor devices.
In multilayer boards of the present invention of the structure described above, the connecting parts between semiconductor elements and the multilayer boards are subjected to less thermal stress and therefore less liable to be broken by thermal fatigue because of the thermal expansion coefficient close to that of the semiconductor elements of 2.6 ppm/xc2x0 C.
When multilayer boards of the present invention are used as an interposer inserted between a motherboard and a semiconductor element, considerable thermal contraction of the motherboard can be avoided because the thermal expansion coefficient of multilayer boards of the present invention lies between the thermal expansion coefficient of the motherboard of 13-17 ppm/xc2x0 C. and the thermal expansion coefficient of the semiconductor element of 2.6 ppm/xc2x0 C.
When one wishes to obtain a multilayer board having a thermal expansion coefficient of less than 10 ppm/xc2x0 C. using conductive layers having a thermal expansion coefficient of 10 ppm/xc2x0 C. or more, such conductive layers may be combined with resin layers having a thermal expansion coefficient of less than 10 ppm/xc2x0 C.
If one wishes to obtain a multilayer board having a desired thermal expansion coefficient, resin layers having varying thermal expansion coefficients may be combined with conductive layers because it is difficult to control the intrinsic thermal expansion coefficients of the conductive layers or resin layers. When resin layers having varying thermal expansion coefficients are used, those having a thermal expansion coefficient of more than 10 ppm/xc2x0 C. may be combined with those having a thermal expansion coefficient of less than 10 ppm/xc2x0 C.
As described above, because the thermal expansion coefficient of a multilayer board of the present invention is close to that of semiconductor element, no breakage occurs at connecting parts due to thermal fatigue.